Scientific journal
Scientific Review. Technical science
ISSN 2500-0799
ПИ №ФС77-57440

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USING MULTIPLY-FREE FIR-FILTERS FOR SAMPLE FREQUENCY REDUCE

Kaplun D.I. 1 Kanatov I.I. 1 Minenkov D.V. 1
1 Saint Petersburg State Electrotechnical University (ETU)
The paper deals with the using of multiply-free fir-filters in digital signal processing devices at the stage of filtration with subsequent down-sampling. Processing path in which decimation filters form a cascade is considered. A comparison of the cascade consisting of several filters with finite impulse response and one including the filter without multipliers is shown. In conclusion the comparative table in the implementation stages considered in FPGA is shown. It is shown that the filter without multipliers allows to deal with the effects of overlap during decimation, while having a small attenuation in stop band. This lack of a filter without multiplications offset by a subsequent filter stage, a filter with finite impulse response. It is shown that the filters without multiplications significant savings FPGA hardware resources without losing quality tract.